1. Field of the Invention
Embodiments of the present invention relate to the field of printed circuit boards (PCBs). More particularly, embodiments of the present invention relate generally to the automatic checking of a circuit to its published design rules.
2. Related Art
Traditionally, motherboard layouts are checked in one of two methods. Checking of the motherboard layout on a PCB using the two methods typically occurs after a motherboard designer has completed layout with a layout design tool and before a geometric translation of the board is generated and sent to the PCB manufacturer.
The first traditional method requires manually checking each net or trace of a group of nets in a layout to make sure that its length, width, and spacing to other nets are in compliance with design rules required by chipsets on the motherboard. This often involved a tedious and time consuming series of operations that was error prone. For example, each net of a group is manually measured, segment by segment. Then the length of the net is entered into a spreadsheet. Thereafter, the length of the net is analyzed to determine if it is in compliance with a design rule for its associated group. This process is extremely tedious and typically required several days of effort per motherboard. Checking spacing compliance is particularly tedious and is not rigorously done.
Automating these checks allows for revalidation after every design modification to make sure that no new problems have been introduced while fixing the previous problem. This automation also facilitates early validation of partial board layouts, thereby allowing earlier fixes.
In the competitive motherboard market, time-to-market is extremely important. The first board to market may gain a huge advantage over competitor motherboards that emerge at a later date. As a result, because of the huge time investment needed, the manual checking of motherboard traces and the steps to fix violations of design rules takes low priority and is sometimes not performed. Unfortunately, signal integrity is compromised since design rule violations are not analyzed and fixed. This leads to a redesign of the board when problems occur, which ultimately delays time to market, or results in field failures. These adversely affect the reputation of the chipset manufacturer and stifle board sales.
A second approach involves entering the design rules into a layout design tool or schematic entry tool, or both. This requires the manual entry of the design rules by the motherboard manufacturer that is designing the motherboard. Insuring that the chipset manufacturer's design rules have been properly read, interpreted, and entered into these tools is problematic. Furthermore, these rules files may be considered proprietary by the motherboard manufacturer so it is difficult for the chipset manufacturer to check them for accuracy and completeness. Getting involved with the customer's schematics for compliance checking is also problematic. Because, the motherboard manufacturer often restricts access to parts of the schematic database as proprietary information. Also, the motherboard manufacturers sometimes use a schematic capture tool that does not have thorough automatic layout design rule checking capabilities. Finally, since different motherboard manufacturers do not typically use the same schematic capture tool, nor do they follow common naming conventions (e.g., for pin names), one common approach solution is very difficult to implement using the schematic entry flow. Therefore it is best if the motherboard manufacturer instead of the chipset designer performs the checks on the motherboard involving the schematic capture tool.
Modern boards are very complex and dense. As a result, using conventional techniques for checking board layout, it is impossible to economically build a board that satisfies all constraints.
As a result, traditional methods and systems for checking motherboard layout routing requires a significant investment of manual checking or data entry, which is tedious, time consuming and error prone.
Modern boards are very complex and dense, making it impossible to economically build a board that satisfies all constraints. It would be advantageous to have a solution that guides a designer in deciding which rules are most important.